High-Rate Machine Learning for Forecasting Time-Series Signals (FCCM 2022 talk), May 17, 2022
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An Overlay Architecture for Pattern Matching (ASAP 2019 talk), July 16, 2019
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OpenVX Graph Optimization for Visual Processor Units (ASAP 2019 talk), July 16, 2019
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OpenVX Graph Acceleration (Texas Instruments presentation), Feb. 13, 2019
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Specialization and Heterogeneity The Last Ride on Moore’s Law? (University of Arkansas talk), Jan. 31, 2019
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Trends in the Infrastructure of Computing (CSCE 190 talk), Oct. 8, 2018
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A Dynamically Reconfigurable Automata Processor Overlay, IEEE ReConFig 2017, Cancun, Mexico, Dec. 5, 2017
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USC CSE Department Chair Job Interview Talk, Nov. 30, 2017
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YSU CS Department Chair Job Interview Talk, Feb. 6, 2017
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High-Level Synthesis of Genomic Search Engine, Dec. 2, 2016: ReConFig 2016
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4 Minute Madness, Nov. 18, 2016: Heterogeneous and Reconfigurable Computing Group
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Texas Instruments, Dec. 17, 2015: Carving New Niches for Keystone: Research in General Purpose DSP Computing at the University of South Carolina
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3 Minute Madness, Oct. 2, 2015: Heterogeneous and Reconfigurable Computing Group
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CSCE 791 Talk, March 6, 2015: Heterogeneous Computing at USC
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2.5 Minute Madness, Sept. 26, 2014: Heterogeneous and Reconfigurable Computing Group
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Lucas-Kanade Optical Flow Estimation on the TI C66x Digital Signal Processor, IEEE HPEC 2014, Waltham, MA, Sept. 10, 2014
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Sparse Matrix-Vector Multiply on the Keystone II Digital Signal Processor, IEEE HPEC 2014, Waltham, MA, Sept. 10, 2014
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Accuracy, Cost, and Performance Trade-offs for Floating-Point Accumulation, ReConFig 2013, Cancun, Mexico, Dec. 11, 2013
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Computer Vision Tasks on the Texas Instruments C6678 Digital Signal Processor, Supercomputing 2013 Emerging Technologies Talk, Nov. 19, 2013
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Sparse Matrix-Vector Multiply on the Texas Instruments C6678 Digital Signal Processor, ASAP 2013, June 6, 2013
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Trends in the Infrastructure of Computing (CSCE 190 talk), Oct. 8, 2012
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2012 IEEE Symposium on Application Accelerators in High-Performance Computing (SAAHPC 2012), July 11, 2012
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CUNY NSF Workshop on Accelerators in High Performance Computing, June 6, 2012
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Trends in the Infrastructure of Computing (CSCE 190 talk), Nov. 14, 2011
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FCCM 2011 talk: A Sparse Matrix Personality for the Convey HC-1
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EPSCoR Workshop at USC for Desktop to Teragrid Project, Apr. 14, 2011: Heterogeneous Computing at USC
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Trends in the Infrastructure of Computing: Processing, Storage, Bandwidth (CSCE 190 talk), Feb. 1, 2011
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Heterogeneous Computing: New Directions for Efficient and Scalable High-Performance Computing, Dec. 3, 2009
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EPSCoR Workshop at Clemson for Desktop to Teragrid Project, Sept. 21, 2010: Heterogeneous Computing at USC
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Seven Minute Madness, Sept. 10, 2010: Heterogeneous Computing
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Heterogeneous Computing: New Directions for Efficient and Scalable High-Performance Computing, Apr. 2, 2009
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An Integrated Reduction Technique for a Double Precision Accumulator (HPRCTA09 talk), Nov. 15, 2009
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Trends in the Infrastructure of Computing: Processing, Storage, Bandwidth (CSCE 190 talk), Nov. 9, 2009
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Seven Minute Madness, Sept. 11, 2009: Heterogeneous Computing
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Heterogeneous Computing (REU Orientation talk), June 1, 2009
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Trends in the Infrastructure of Computing: Processing, Storage, Bandwidth (CSCE 190 talk), Apr. 13, 2009
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Seven Minute Madness, Sept. 12, 2008: Reconfigurable Computing
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Reconfigurable Computing in Undergraduate Education, UNC-Charlotte, May 9, 2008
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Integrated Circuit Design and Fabrication (high school ELE talk), Apr. 18 and 25, 2008
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High-Performance Reconfigurable Computing for Genome Analysis (invited talk at UNC-Charlotte), Mar. 28, 2008
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Trends in the Infrastructure of Computing: Processing, Storage, Bandwidth (CSCE 190 talk), Nov. 5, 2007
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IEEE International Conference on Bioinformatics and Bioengineering (BIBE 2007), October 14, 2007
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Seven Minute Madness, Sept. 14, 2007: Reconfigurable Computing
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IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2007), April 23, 2007
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Seven Minute Madness, Sept. 8, 2006: Special-Purpose Parallel Architectures
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Reconstructing Phylogenies from Gene-Order Data
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Current Research Overview
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Predictive Load Balancing for Interconnected FPGAs
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Talk on Direct Networks
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Older Talks
Ph.D. defense talk
Lightweight Hierarchical Error Control Codes for Multi-Bit Differential Channels
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Ph.D. proposal talk
Lightweight Hierarchical Error Control Codes for Multi-Bit Differential Channels
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Competition talk
Lightweight Hierarchical Error Control Codes for Multi-Bit Differential Channels
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MIPS Instruction Set Architecture
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Next-Generation Interconnection Technology for High-Performance Computer Systems
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DAC2004 research competition presentation
Multi-Bit Differential Signaling Prototype Chip
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Optics in Computing 2003 talk
Optoelectronic Multi-Chip Module Demonstrator System
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Research Plan
My old research plan circa March 2005
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