Hands-on Tutorial on SmartNICs / Data Processing Units (DPUs)

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Hands-on Tutorial on SmartNICs / Data Processing Units (DPUs)

 

Monday, October 26
Internet2 TechEx 2026
Minneapolis, Minnesota
8:00 AM - 11:30 AM

 

Organizers

University of South Carolina
Internet2

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Overview

Traditionally, infrastructure workloads such as networking, security, and storage have been handled by the host’s general-purpose CPUs, consuming precious processing cycles. As the scale and complexity of network operations grow, offloading these tasks has become essential. SmartNICs address this need by shifting these functions from the CPU to the NIC, where domain-specific hardware accelerators—often implemented as ASICs—enable efficient execution of tasks such as custom packet processing, deep packet inspection, encryption, and storage operations at line rate. This offloading not only frees the CPU from intensive background processing but also enhances throughput, reduces latency, and improves the scalability and security of modern computing infrastructures. While large cloud providers are now using SmartNICs, campus networks and small- and medium-sized enterprises have yet to fully benefit from their advantages. An important barrier preventing the adoption of SmartNICs is the lack of engaging training materials.

This tutorial, organized by the University of South Carolina and Internet2, will provide an effective hands-on training on SmartNICs. The tutorial will cover offloading core infrastructure workloads to the domain-specific accelerators of the SmartNICs. The content is designed for CI engineers, network administrators, and research computing professionals. The labs leverage the NVIDIA BlueField DPU and are accessible through a web-based environment. No specialized hardware, SSH, or root access are required to complete the exercises.

 

Audience

The target audience for this tutorial includes Information Technology (IT) professionals and practitioners, researchers, and application developers. The tutorial can also be useful for instructors interested in teaching DPU-related technologies in the classrooms.

 

Tutorial Goals

The workshop aims to equip participants with both theoretical knowledge and practical skills related to packet processing in high-speed networks. By the end of this workshop, attendees will:

  • Understand the programming models of DPUs
  • Describe the elements of the Portable NIC Architecture (PNA), define and parse protocol headers and header fields in P4, define match-action tables and populate them at runtime.
  • Implement DPU applications using the DOCA framework.
  • Develop P4-based DPU pipelines using the DPL framework.
  • Understand the Data-path accelerator (DPA) on the BlueField-3 DPU

Pre-requisites

Connectivity to the Internet and a browser to access the online virtual platform. Attendees will be provided with an account to access USC’s NETLAB system: https://netlab.cec.sc.edu/

Agenda

Monday, October 26 
Time (GMT)TopicPresenter
8:00 - 8:40Overview of Data Processing Units (DPUs) and their Applications [PDF, PPT] Elie Kfoury (USC), Jennifer Kim (Internet2), Jorge Crichigno (USC)
8:45 - 9:40Lab 1: Hardware Decompression with DOCA Compress [PDF, PPT] Elie Kfoury (USC)
9:40 - 10:00Break 
10:00 - 10:45Lab 2: Packet Processing on the DPA Cores [PDF, PPT]Elie Kfoury (USC)
10:45 - 11:25Lab 3: Match-Action Tables in P4 DPL [PDF, PPT]Elie Kfoury (USC)
11:25 - 11:30Summary 

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