Hands-On Tutorial on Infrastructure Workload Offloading Using SmartNICs/DPUs

Overview

Traditionally, infrastructure workloads such as networking, security, and storage have been handled by the host’s general-purpose CPUs, consuming precious processing cycles. As the scale and complexity of network operations grow, offloading these tasks has become essential. SmartNICs address this need by shifting these functions from the CPU to the NIC, where domain-specific hardware accelerators—often implemented as ASICs—enable efficient execution of tasks such as custom packet processing, deep packet inspection, encryption, and storage operations at line rate. This offloading not only frees the CPU from intensive background processing but also enhances throughput, reduces latency, and improves the scalability and security of modern computing infrastructures. While large cloud providers are now using SmartNICs, campus networks and small- and medium-sized enterprises have yet to fully benefit from their advantages. An important barrier preventing the adoption of SmartNICs is the lack of engaging training materials.

This tutorial, organized by the University of South Carolina and Internet2, will provide an effective hands-on training on SmartNICs. The tutorial will cover offloading core infrastructure workloads to the domain-specific accelerators of the SmartNICs. The content is designed for CI engineers, network administrators, and research computing professionals. The labs leverage the NVIDIA BlueField DPU and are accessible through a web-based environment. No specialized hardware, SSH, or root access are required to complete the exercises.

Audience

The target audience for this tutorial includes Information Technology (IT) professionals and practitioners, researchers, and application developers. The tutorial can also be useful for instructors interested in teaching DPU-related technologies in the classrooms.

Tutorial Goals

The workshop aims to equip participants with both theoretical knowledge and practical skills related to packet processing in high-speed networks. By the end of this workshop, attendees will:

• Understand the programming models of DPUs
• Describe the elements of the Portable NIC Architecture (PNA), define and parse protocol headers and header fields in P4, define match-action tables and populate them at runtime.
• Implement DPU applications using the DOCA framework.
• Develop P4-based DPU pipelines using the DPL framework.