Introductory and Advanced Topics on
P4 Programmable Data Plane Switches
Monday June 13 – Friday June 17, 2022
WASTC 2022 vFDW Link
- Western Academy Support and Training Center (WASTC)
- University of South Carolina (UofSC)
- Energy Sciences Network (ESnet)
- Department of Energy (DOE) Office of Science
- Online via Zoom
- Link will be published soon
- NetLab link: https://netlab.cec.sc.edu/
Overview
This tutorial provides Information Technology (IT) professionals with hands-on exercises on P4 programmable data plane switches, covering from introductory to advanced topics. Programmable data plane switches have recently emerged, attracting significant attention from the industry and the academia. They permit operators and programmers in general to run customized packet processing functions in the data plane at terabit rates, thus paving the way for an unprecedented wave of innovation and experimentation by reducing the time of designing, testing, and adopting new protocols; enabling a customized, top-down approach to develop network applications; providing granular visibility of packet events defined by the programmer; reducing complexity and enhancing resource utilization of the programmable switches; and drastically improving the performance of applications that are offloaded to the data plane. This tutorial will permit each attendee to execute virtual laboratory experiments, covering a wide range of features and topics related to P4 programmable switches, from introductory to advanced levels.
Outcomes
By the end of this tutorial, attendees will:
P4 Programmable Data Plane Switches (Part I):
- Describe the elements of the Protocol Independent Switch Architecture (PISA)
- Define protocol headers and header fields in P4
- Write simple parsers using P4
- Define match-action tables
- Populate and manage match-action tables at runtime
- Verify and update checksums
P4 Programmable Data Plane Switches (Part II):
- Define and process custom headers
- Inspect and use the standard metadata provided by the switch
- Create and parse header stacks
- Count flow statistics
- Store arbitrary data using registers
- Notify the control plane using digests
Intended Audience
The tutorial is targeted to IT educators and professionals such as system administrators, network engineers, practitioners. The content is suitable for instructors who want to incorporate advanced material into their networking classes. The content is available for NETLAB systems.
Award Information
This activity is supported by NSF award 2118311. Link to official webpage: NSF-2118311
Pre-requisites
The laboratory environment consists of routers, switches, and hosts deployed in IPv4 networks. Attendees are expected to know basic networking (IPv4, local area networks, OSI model). Training activities will be conducted using NetLab. Attendees will be provided with a username and a password.
Agenda
DAY 1: Monday, June 13
| Time | Topic | Presenter |
|---|---|---|
| 09:00 - 09:15 | Tutorial Overview | Jorge Crichigno, Mariam Kiran |
| 09:15 - 09:45 | Motivation for Data Plane Programmability [PDF, PPT] | Jorge Crichigno, Mariam Kiran |
| 09:45 - 09:50 | Overview of P4 Programmable Data Plane Switches (BMv2) (Part I) [PDF, PPT] | Jorge Crichigno |
| 09:50 - 10:00 | Break | |
| 10:00 - 10:30 | Lab 1: Introduction to Mininet [PDF, PPT] | Elie Kfoury, Jose Gomez |
| 10:30 - 11:00 | Lab 2: Introduction to P4 and BMv2 [PDF, PPT] | Jose Gomez, Elie Kfoury |
| 11:00 - 11:10 | Break | |
| 11:10 - 11:45 | Lab 3: P4 Program Building Blocks [PDF, PPT] | Elie Kfoury, Ali AlSabeh |
| 11:45 - 12:00 | Discussion and Summary Day 1 | Jorge Crichigno |
| 12:00 - 13:00 | Lunch | |
| 13:00 - 14:00 | Office hours | Jorge Crichigno |
| Day 1 | Video | |
DAY 2: Tuesday, June 14
| Time | Topic | Presenter |
|---|---|---|
| 09:00 - 09:05 | Review Labs 1-3 P4-BMv2 Lab Series | Jorge Crichigno |
| 09:05 - 09:25 | Parsers, Match-action Tables [PDF, PPT] | Jorge Crichigno, Mariam Kiran |
| 09:25 - 10:10 | Lab 4: Parser Implementation [PDF, PPT] | Ali AlSabeh, Jose Gomez |
| 10:10 - 10:20 | Break | |
| 10:20 - 11:00 | Lab 5: Match-action Tables (Part 1) [PDF, PPT] | Jose Gomez, Elie Kfoury |
| 11:00 - 11:10 | Break | |
| 11:10 - 11:50 | Lab 6: Match-action Tables (Part 2) [PDF, PPT] | Elie Kfoury, Jose Gomez |
| 11:50 - 12:00 | Discussion and Summary of Day 2 | Jorge Crichigno |
| 12:00 - 13:00 | Lunch | |
| 13:00 - 14:00 | Office hours | Jorge Crichigno |
| Day 2 | Video | |
DAY 3: Wednesday, June 15
| Time | Topic | Presenter |
|---|---|---|
| 09:00 - 09:05 | Review Labs 4-6 P4-BMv2 Lab Series | Jorge Crichigno |
| 09:05 - 09:25 | Runtime Controller, Checksum Calculation, Deparser [PDF, PPT] | Jorge Crichigno, Mariam Kiran |
| 09:25 - 10:05 | Lab 7: Populating and Managing Match-action Tables at Runtime [PDF, PPT] | Ali AlSabeh, Jose Gomez |
| 10:05 - 10:15 | Break | |
| 10:15 - 10:50 | Lab 8: Checksum Recalculation and Packet Deparsing [PDF, PPT] | Elie Kfoury, Jose Gomez |
| 10:50 - 11:00 | Break | |
| 11:00 - 11:50 | Exercise 6: Building a Packet Reflector [PDF, PPT] | Jose Gomez, Elie Kfoury |
| 11:50 - 12:00 | Discussion and Summary of Day 3 | Jorge Crichigno |
| 12:00 - 13:00 | Lunch | |
| 13:00 - 14:00 | Office hours | Jorge Crichigno |
| Day 3 | Video | |
DAY 4: Thursday June 16
| Time | Topic | Presenter |
|---|---|---|
| 09:00 - 09:05 | Review Labs 7, 8 P4-BMv2 Lab Series | Jorge Crichigno |
| 09:05 - 09:25 | Standard Metadata and Counters [PDF, PPT] | Jorge Crichigno, Mariam Kiran |
| 09:25 - 10:20 | Lab 5: Monitoring the Switch's Queue using Standard Metadata [PDF, PPT] | Elie Kfoury, Jose Gomez |
| 10:20 - 10:30 | Break | |
| 10:30 - 11:20 | Lab 7: Measuring Flow Statistics using Direct and Indirect Counters [PDF, PPT] | Ali AlSabeh, Jose Gomez |
| 11:20 - 11:30 | Break | |
| 11:30 - 12:00 | Motivation and Applications of Stateful Elements in P4 [PDF, PPT] | Mariam Kiran |
| 12:00 - 13:00 | Lunch | |
| 13:00 - 14:00 | Office hours | Jorge Crichigno |
| Day 4 | Video | |
DAY 5: Friday, June 17
| Time | Topic | Presenter |
|---|---|---|
| 09:05 - 09:25 | Registers, Packet Digests [PDF, PPT] | Jorge Crichigno |
| 09:25 - 10:10 | Lab 9: Storing Arbitrary Data using Registers [PDF, PPT] | Jose Gomez, Ali AlSabeh |
| 10:10 - 10:20 | Break | |
| 10:20 - 11:10 | Lab 11: Notifying the Control Plane from the Data Plane using Packet Digests [PDF, PPT] | Elie Kfoury, Ali AlSabeh |
| 11:10 - 11:20 | Break | |
| 11:20 - 11:40 | Workshop Summary and Final Discussion | Jorge Crichigno |
| Day 5 | Video | |
Resources
| Item | Note |
|---|---|
| VM for P4 Programmable Data Plane Switches (BMv2) Labs Link | Virtual Machine for the P4 Programmable Data Plane Switches (BMv2) lab series |
| VM for P4 Programmable Data Planes: Applications, Stateful Elements, and Custom Packet Processing Labs Link | Virtual Machine for the P4 Programmable Data Planes: Applications, Stateful Elements, and Custom Packet Processing lab series |
| P4 Cheat Sheet: Link | P4 language cheat sheet |
| BMv2 Docker Containers: Link | DockerHub link for the BMv2 containers |
| Cybertraining Material: Link | List of virtual labs on P4, SDN, network tools and protocols, ... |
| P4 Campus: Link | P4 applications for campus networks |
| FABRIC: Link | A programmable research infrastructure |
| Behavioral Model version 2 (BMv2): Link | Reference P4 software switch used as a tool for developing, testing and debugging P4 data planes |
| Software-Defined Networks: A Systems Approach: Link | A book that explores the key principles of Software-Defined Networking (SDN) |
| Mininet: Link | Virtual testbed enabling the development and testing of network tools and protocols |
| Containernet: Link | Mininet fork that allows to use Docker containers as hosts in emulated networks |
| Mininet Installation: Link | A guide that describes the steps to install Mininet on Linux |
| Wireshark: Link | Packet analyzer used for network troubleshooting, analysis, protocol development, and education |